13 kV RMU Fault Detection
Mixed-signal front-end with high-isolation for partial-discharge sensing on live grid assets.
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Capability
PCB Design Services in Australia
Schematic capture through fab-ready gerbers, by engineers who take the resulting boards through bring-up, EMC pre-compliance and production themselves. Layout choices are made with the whole product in view - the firmware that will run, the enclosure it sits inside, the chamber it will one day be measured in.
Scope
What PCB design covers - and what it doesn't.
PCB design is the discipline of turning a set of electrical constraints into a manufacturable board. We treat it as a system problem: the layer stackup, the return-path plan and the placement decisions upstream of routing set the ceiling on EMC, signal integrity and thermal outcomes downstream.
In scope
- Schematic capture, symbol and footprint libraries with datasheet verification
- Multi-layer stackup design (2-16+ layer boards, controlled impedance)
- High-speed routing (USB 3.x, gigabit Ethernet, DDR3/4, MIPI, PCIe)
- RF/wireless layout for sub-GHz, 2.4/5 GHz and cellular front-ends
- Power integrity: multi-rail power trees, decoupling, thermal relief
- EMC-aware layout: stackups, return paths, filtering, guard bands
- DFM for Australian and offshore fabs and assemblers
- Prototype build coordination, first-article inspection, respin support
Honestly out of scope
- Board fabrication itself - we design for fabs, we are not one
- One-off hand-solder assembly (we specify test fixtures, not build them)
- Custom ASIC or FPGA-first designs (we work around proven silicon)
- Component sourcing brokerage (we spec parts, you or your CM procure)
Outcomes
What you get out of it.
A layout is not a deliverable - a manufacturable, testable board that meets its constraints is. The outcomes that recur across the boards we ship:
Boards that assemble cleanly
DFM review before gerber release catches the pad-size errors, missing fiducials and impossible densities that assemblers charge respin fees to work around. First-pass yield on our prototype runs is measured at the assembly line, not assumed.
EMC pass on the first chamber visit
Stackup, decoupling and return-path plans decided in week one - not after a failed pre-compliance day. When a design has an emissions problem waiting inside it, we say so in the design review.
Thermal budgets that hold
Copper pours, cutouts and component placement chosen to hit measured junction temperatures - not simulated ones from optimistic ambient assumptions.
A design a second team can maintain
Hierarchical schematics with real net-class rules, documented stackups, and BOM alternates flagged where a single-source part could kill a production run.
Process
How a PCB design program runs here.
Four phases with a real deliverable at each gate - you always know what you paid for and what ships next.
PHASE 01
Discover (paid week)
We start from the constraint that binds - power, latency, thermal, certification - and design backwards from it. You leave with a written architecture, a budget range and the risks named, whether or not we build it.
PHASE 02
Design
Schematics, mechanical and firmware architecture proceed in parallel. High-risk blocks get simulated or breadboarded before the full layout commits.
PHASE 03
Build
Iterative revisions against real bench and field testing. You see every revision, not just the last one. Integration is continuous, not a phase.
PHASE 04
Deploy
Pilot in the field, closure with the contract manufacturer, production test procedures, and a commissioning-grade handover pack.
Technologies
What we build on - chosen per constraint, not per preference.
The platforms we reach for most. If a project needs something not on this list, we say so - the tool is chosen for the constraint, never to fit our habits.
Altium DesignerKiCad 8.xHyperLynx (SI/PI)SigritySTM32 host + MCU designsESP32 wireless carriersNVIDIA Jetson carriersRF: sub-GHz, 2.4/5 GHz, LTEPower: point-of-load, PoE, isolated DC-DCIPC-2221/2222 class 2-3JLCPCB / PCBWay / AU-domestic fabs
Industries
Where PCB design we ship runs today.
Deliverables & IP
What ships to you at handover.
Every PCB project hands over: schematic source (Altium or KiCad native), PCB source with impedance-controlled stackup documented, complete fabrication package (gerbers, drill, netlist, IPC-2581 or ODB++), assembly package (BOM with distributor part numbers plus alternates, pick-and-place, test-point list), impedance report where applicable, and a design-decision log so a future engineer can read why a choice was made, not just what. All foreground design work transfers to you on payment.
Case studies
Programs we shipped in this space.
Every entry links to the full case study - constraints, what we built, and what it measured afterwards.
Inline Weld Seam Inspection
Industrial-carrier board for line-side inference with sub-40 ms deterministic paths.
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Building Energy & Utility Monitoring
Multi-input meter interface designed for retrofit into live switchboards.
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Compliance
Compliance-aware from stackup to silkscreen.
Boards destined for Australian sale carry the RCM; radio products add ACMA obligations; export products layer CE and FCC on top. We design for EMC at the layout stage: proper reference planes, controlled return paths, filtering at every I/O boundary, and shielding budgeted before the enclosure closes around it. Pre-compliance scans against real spectrum analysers happen before formal chamber time is booked.
Safety-critical or high-voltage boards get creepage/clearance rules baked into the schematic capture, not chased at layout. Boards for functional-safety systems get design reviews aligned with the target standard’s expectations. Where the standard demands a certified partner (medical devices, automotive functional safety), we say so up front.
FAQ
PCB Design Services in Australia - straight answers.
Simple 2-layer boards typically run AUD $2,000-$6,000 design fee; 4-6 layer mixed-signal boards AUD $8,000-$25,000; complex high-speed or RF boards AUD $25,000-$60,000+. All quotes come after a short scoping call that lists layer count, signal count, RF/high-speed content, and EMC scope.
A straightforward 2-4 layer board: 3-5 weeks from spec to fab-out. High-speed or RF boards: 6-12 weeks. Add 1-3 weeks for prototype fab and assembly, and always budget one revision cycle - almost every design that meets an ambitious constraint learns something at first bring-up.
Yes - the EMC plan starts at layout, not after tapeout. We run pre-compliance scans (near-field probing, spectrum analyser sweeps) on prototype units before formal chamber time. We do not run accredited chambers ourselves; we work with them.
Yes, and often. We start with a paid design review that reads the schematic against real datasheets, walks the layout for return-path and thermal issues, and tells you what is salvageable. Sometimes the honest answer is respin.
Both. Altium is our default for complex projects; KiCad is used where the client wants to maintain the design in an open toolchain. Files always come as native project sources plus fabrication packages that any fab can read.
You do. Schematic, layout, library symbols and footprints created for your project transfer on payment. Pre-existing library elements we bring in are licensed to you perpetually.
Why Incendio
One team, no seam between vendors.
PCB design detached from the firmware, mechanical and chamber-testing that comes next produces boards that pass DRC and fail everywhere else. We hold the whole product view - the firmware that will run, the enclosure it sits inside, the chamber it will be measured in - which is why our first-pass fab yield and first-chamber EMC pass rate are why teams keep coming back.
Related practices: embedded systems development, firmware development, hardware product development, IoT development.
Start
Tell us the constraint that worries you most.
A latency budget, a power budget, a certification date. We reply within one business day - and we’ll say so if we’re not the right team.